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Step 1 of 3 8.067E The polynomial that yields a maximum length sequence for a 8-bit LFSR is where are [8, 6, 5, 4] are the positions of the taps. The bit positions that affect the next state are called the taps. Step 2 of 3 library IEEE; use use entity counter is port (CLK, CLR_L, LD_L, ENP, ENT: in STD_LOGIC; N: in unsigned(7 downto 0); Z: out unsigned(7 downto 0)); end counter; architecture counter_arch of counter is signal a: STD_LOGIC; Signal IQ: unsigned(7 downto 0); begin process(CLK, ENT, N) begin if(CLK'event and CLK = '1') then if CLR_L = '0' then IQ '0'); elsif LD_L = '0' then IQ